1. Field of the Invention
The invention relates to the field of computer processors and sharing a cache between two operational entities in an integrated processor. More specifically, the invention relates to a system and method for sharing a cache memory between a graphics engine and a processor core in an integrated processor.
2. Background of the Invention
In some popular personal computer designs, a central processing unit (CPU) is coupled to a motherboard and communicates with main memory, disk drives, and other peripherals via a bus. Some personal computer systems are augmented by a graphics controller that is used to take the burden of rendering images off of the CPU. The graphics controller is often a separate add-on card that may be inserted into a slot on the motherboard. The graphics controller includes a specialized graphics engine and dedicated graphics memory that may be referred to as a frame buffer or video memory. In this design, the processor may also be augmented by one or more levels of cache memory which are dedicated to the processor. The cache memory may exist on or off of the die of the processor. In this kind of system, the CPU may access its cache memory and the main memory to process instructions, and the graphics engine may access its dedicated video memory and the main memory to render graphical images. However, in rendering graphics, the graphics engine may need to use memory in addition to the video memory. To do so, the graphics controller accesses the computer""s main memory. Accessing the main memory is relatively slow as bus arbitration and relatively slower bus speed when compared to the speed inherent in accessing the dedicated video memory result in increased access time that lowers performance.